The present invention relates to a power transistor with self-protection against direct secondary breakdown.
As is known, direct secondary breakdown is the main cause of malfunction in power transistors and occurs due to a concentration of current in a specific region so that the local temperature increase has a regenerative effect on the accumulation of current in said region and represents a positive feedback phenomenon.
It is furthermore known that the main impediment to the obtainment of an improved direct secondary breakdown phenomena withstanding ability of power transistors is due to the electrothermic interaction among the different power dissipating regions of the transistor.
In order to improve the ability of transistors to withstand to such stresses, several solutions have already been proposed. In particular, one solution entails the use of resistors, so-called ballast resistors, in series to the emitter of each elementary transistor constituting the complete power transistor. Another solution is proposed in the U.K. Pat. No. 1,467,612, disclosing replacing each elementary transistor with a pair of transistors geometrically arranged so as to obtain a compensation of the thermal imbalances. Yet another solution is the one known from the Italian patent application No. 21028 A/84, in the name of the assignee of the present application, according to which each elementary transistor is controlled by means of its own current source so as to reduce electrothermic regeneration phenomena.
Such known solutions allow to reduce only partly the phenomenon of direct secondary breakdown and are not always free from disadvantages.
A substantial improvement in the problem is instead achieved according to the solution indicated in the U.S. Pat. No. 4,682,197, assigned to the same assignee of the present application. According to the solution described in the abovementioned patent, it is possible to obtain an integrated semiconductor device capable of delivering a power which is equal to the sum of the powers supplied by each elementary transistor (formed by a plurality of cells and indicated also as a "finger", the latter including a group of cells) if a bipolar power transistor is produced. In detail, the device consists of a plurality of elementary transistors electrically connected but physically spaced apart by an amount equal to 17 mils (i.e. approximately the width of a single finger).
Since however in most cases the maximum number of fingers constituting the power transistor is set by the saturation voltage, the solution indicated in the last-mentioned patent does not constitute a fully optimum solution as to the bulk of said power transistor. Moreover, the solutions indicated in order to minimize the bulk of the device, such as the insertion, between two adjacent elementary transistors, of the drive transistors operating as current sources or of the elementary transistors of the complementary stage, if the device constitutes a class-B output stage the two output transistors whereof operate alternately, are limited in their usefulness, in particular when the double metal level cannot be used.